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? semiconductor components industries, llc, 2006 july, 2006 ? rev. 2 1 publication order number: mc33102/d mc33102 sleep?mode ? two?state, micropower operational amplifier the mc33102 dual operational amplifier is an innovative design concept employing sleep ? mode technology. sleep ? mode amplifiers have two separate states, a sleepmode and an awakemode. in sleepmode, the amplifier is active and waiting for an input signal. when a signal is applied causing the amplifier to source or sink 160 a (typically) to the load, it will automatically switch to the awakemode which offers higher slew rate, gain bandwidth, and drive capability. ? two states: ?sleepmode? (micropower) and ?awakemode? (high performance) ? switches from sleepmode to awakemode in 4.0 s when output current exceeds the threshold current (r l = 600 ) ? independent sleepmode function for each op amp ? standard pinouts ? no additional pins or components required ? sleepmode state ? can be used in the low current idle state as a fully functional micropower amplifier ? automatic return to sleepmode when output current drops below threshold ? no deadband/crossover distortion; as low as 1.0 hz in the awakemode ? drop ? in replacement for many other dual op amps ? esd clamps on inputs increase reliability without affecting device operation typical sleepmode/awakemode performance characteristic sleepmode (typical) awakemode (typical) unit low current drain 45 750 a low input offset voltage 0.15 0.15 mv high output current capability 0.15 50 ma low t.c. of input offset voltage 1.0 1.0 v/ c high gain bandwidth (@ 20 khz) 0.33 4.6 mhz high slew rate 0.16 1.7 v/ s low noise (@ 1.0 khz) 28 9.0 nv/ hz device package shipping ordering information mc33102d so ? 8 98 units/rail MC33102DR2 so ? 8 http://onsemi.com 2500 tape & reel pdip ? 8 p suffix case 626 1 8 so ? 8 d suffix case 751 1 8 marking diagrams 33102 alyw 1 8 awl mc33102p 1 8 yyww a = assembly location wl, l = wafer lot yy, y = year ww, w = work week mc33102p pdip ? 8 50 units/rail pin connections 1 output 1 v cc output 2 (dual, top view) inputs 1 v ee inputs 2 2 3 4 1 2 5 6 7 8
mc33102 http://onsemi.com 2 simplified block diagram fractional load current detector % of i l current threshold detector awake to sleepmode delay circuit buffer buffer i ref c storage i hysteresis i enable enable i awake sleepmode current regulator awakemode current regulator i sleep v in i l v out r l i bias op amp maximum ratings ratings symbol value unit supply voltage (v cc to v ee ) v s +36 v input differential voltage range input voltage range v idr v ir note 1 v output short circuit duration (note 2) t sc note 2 sec maximum junction temperature storage temperature t j t stg +150 ? 65 to +150 c maximum power dissipation p d note 2 mw 1. either or both input voltages should not exceed v cc or v ee . 2. power dissipation must be considered to ensure maximum junction temperature (t j ) is not exceeded (refer to figure 1).
mc33102 http://onsemi.com 3 dc electrical characteristics (v cc = +15 v, v ee = ? 15 v, t a = 25 c, unless otherwise noted.) characteristics figure symbol min typ max unit input offset voltage (r s = 50 , v cm = 0 v, v o = 0 v) sleepmode t a = +25 c t a = ? 40 to +85 c awakemode t a = +25 c t a = ? 40 to +85 c 2 ? v io ? ? ? ? ? 0.15 ? 0.15 ? 2.0 3.0 2.0 3.0 mv input offset voltage temperature coefficient (r s = 50 , v cm = 0 v, v o = 0 v) t a = ? 40 to +85 c (sleepmode and awakemode) 3 v io / t ? 1.0 ? v/ c input bias current (v cm = 0 v, v o = 0 v) sleepmode t a = +25 c t a = ? 40 to +85 c awakemode t a = +25 c t a = ? 40 to +85 c 4, 6 i ib ? ? ? ? 8.0 ? 100 ? 50 60 500 600 na input offset current (v cm = 0 v, v o = 0 v) sleepmode t a = +25 c t a = ? 40 to +85 c awakemode t a = +25 c t a = ? 40 to +85 c ? ? i io ? ? ? ? ? 0.5 ? 5.0 ? 5.0 6.0 50 60 na common mode input voltage range ( v io = 5.0 mv, v o = 0 v) sleepmode and awakemode 5 v icr ? 13 ? ? 14.8 +14.2 ? +13 v large signal voltage gain sleepmode (rl = 1.0 m ) t a = +25 c t a = ? 40 to +85 c awakemode (v o = 10 v, r l = 600 ) t a = +25 c t a = ? 40 to +85 c 7 a vol 25 15 50 25 200 ? 700 ? ? ? ? ? kv/v output voltage swing (v id = 1.0 v) sleepmode (v cc = +15 v, v ee = ? 15 v) r l = 1.0 m r l = 1.0 m awakemode (v cc = +15 v, v ee = ? 15 v) r l = 600 r l = 600 r l = 2.0 k r l = 2.0 k awakemode (v cc = +2.5 v, v ee = ? 2.5 v) r l = 600 r l = 600 8, 9, 10 v o+ v o ? v o+ v o ? v o+ v o ? v o+ v o ? +13.5 ? +12.5 ? +13.3 ? +1.1 ? +14.2 ? 14.2 +13.6 ? 13.6 +14 ? 14 +1.6 ? 1.6 ? ? 13.5 ? ? 12.5 ? ? 13.3 ? ? 1.1 v v common mode rejection (v cm = 13 v) sleepmode and awakemode 11 cmr 80 90 ? db power supply rejection (v cc /v ee = +15 v/ ? 15 v, 5.0 v/ ? 15 v, +15 v/ ? 5.0 v) sleepmode and awakemode 12 psr 80 100 ? db
mc33102 http://onsemi.com 4 dc electrical characteristics (v cc = +15 v, v ee = ? 15 v, t a = 25 c, unless otherwise noted.) characteristics unit max typ min symbol figure output transition current sleepmode to awakemode (source/sink) (v s = 15 v) (v s = 2.5 v) awakemode to sleepmode (source/sink) (v s = 15 v) (v s = 2.5 v) 13, 14 ? i th1 ? ? i th2 ? 200 250 ? ? 160 200 142 180 ? ? 90 140 a output short circuit current (awakemode) (v id = 1.0 v, output to ground) source sink 15, 16 ? i sc ? 50 50 110 110 ? ? ma power supply current (per amplifier) (a cl = 1, v o = 0v) sleepmode (v s = 15 v) t a = +25 c t a = ? 40 to +85 c sleepmode (v s = 2.5 v) t a = +25 c t a = ? 40 to +85 c awakemode (v s = 15 v) t a = +25 c t a = ? 40 to +85 c 17 i d ? ? ? ? ? ? 45 48 38 42 750 800 65 70 65 ? 800 900 a
mc33102 http://onsemi.com 5 ac electrical characteristics (v cc = +15 v, v ee = ? 15 v, t a = 25 c, unless otherwise noted.) characteristics figure symbol min typ max unit slew rate (v in = ? 5.0 v to +5.0 v, c l = 50 pf, a v = 1.0) sleepmode (r l = 1.0 m ) awakemode (r l = 600 ) 18 sr 0.10 1.0 0.16 1.7 ? ? v/ s gain bandwidth product sleepmode (f = 10 khz) awakemode (f = 20 khz) 19 gbw 0.25 3.5 0.33 4.6 ? ? mhz sleepmode to awakemode transition time (a cl = 0.1, v in = 0 v to +5.0 v) r l = 600 r l = 10 k 20, 21 t tr1 ? ? 4.0 15 ? ? s awakemode to sleepmode transition time 22 t tr2 ? 1.5 ? sec unity gain frequency (open loop) sleepmode (r l = 100 k , c l = 0 pf) awakemode (r l = 600 , c l = 0 pf) f u ? ? 200 2500 ? ? khz gain margin sleepmode (r l = 100 k , c l = 0 pf) awakemode (r l = 600 , c l = 0 pf) 23, 25 a m ? ? 13 12 ? ? db phase margin sleepmode (r l = 100 k , c l = 0 pf) awakemode (r l = 600 , c l = 0 pf) 24, 26 ? m ? ? 60 60 ? ? degree s channel separation (f = 100 hz to 20 khz) sleepmode and awakemode 29 cs ? 120 ? db power bandwidth (awakemode) (v o = 10 v pp , r l = 100 k , thd 1%) bw p ? 20 ? khz total harmonic distortion (v o = 2.0 v pp , a v = 1.0) awakemode (r l = 600 ) f = 1.0 khz f = 10 khz f = 20 khz 30 thd ? ? ? 0.005 0.016 0.031 ? ? ? % dc output impedance (v o = 0 v, a v = 10, i q = 10 a) sleepmode awakemode 31 r o ? ? 1.0 k 96 ? ? differential input resistance (v cm = 0 v) sleepmode awakemode r in ? ? 1.3 0.17 ? ? m differential input capacitance (v cm = 0 v) sleepmode awakemode c in ? ? 0.4 4.0 ? ? pf equivalent input noise voltage (f = 1.0 khz, r s = 100 ) sleepmode awakemode 32 e n ? ? 28 9.0 ? ? nv/ hz equivalent input noise current (f = 1.0 khz) sleepmode awakemode 33 i n ? ? 0.01 0.05 ? ? pa/ hz
mc33102 http://onsemi.com 6 sleepmode awakemode v cc = +15 v v ee = ?15 v t a = 25 c t a , ambient temperature ( c) 10.0 , sleepmode input bias current (na) ib i 8.0 6.0 4.0 2.0 0 , awakemode input bias current (na) ib i , awakemode input bias current (na) ib i figure 1. maximum power dissipation versus temperature , maximum power dissipation (mw ) d(max) p t a , ambient temperature ( c) 2500 percent of amplifiers (%) v io , input offset voltage (mv) 50 percent of amplifiers (%) tcv io , input offset voltage temperature coefficient ( v/ c) 35 , sleepmode input bias current (na) ib i v cm , common mode input voltage (v) 10.5 , input common mode voltage range (v) icr v t a , ambient temperature ( c) v cc 2000 1500 1000 500 0 40 30 20 10 0 30 25 20 15 10 5.0 0 9.5 8.5 7.5 6.5 100 v cc ?0.5 v cc ?1.0 v ee +1.0 v ee +0.5 v ee ?55 ?25 0 25 50 85 125 ?40 ?1.0 ?5.0 ?15 ?10 ?5.0 0 5.0 15 10 ?55 ?25 0 25 50 85 125 ?0.8 ?0.6 ?0.4 ?0.2 0 0.2 0.4 0.6 0.8 1.0 ?4.0 ?3.0 ?2.0 ?1.0 0 1.0 2.0 3.0 4.0 5.0 ?40 ?55 ?25 0 25 50 125 85 ?40 mc33102p mc33102d 204 amplifiers tested from 3 wafer lots. v cc = +15 v v ee = ?15 v t a = 25 c percent sleepmode percent awakemode figure 2. distribution of input offset voltage (mc33102d package) figure 3. input offset voltage temperature coefficient distribution (mc33102d package) percent sleepmode percent awakemode 204 amplifiers tested from 3 wafer lots. v cc = +15 v v ee = ?15 v t a = ? 40 c to 85 c 100 80 60 40 20 0 90 80 70 60 v cc = +15 v v ee = ?15 v v io = 5.0 mv v cc = +15 v v ee = ?15 v v cm = 0 v awakemode awakemode awakemode sleepmode sleepmode sleepmode figure 4. input bias current versus common mode input voltage figure 5. input common mode voltage range versus temperature figure 6. input bias current versus temperature
mc33102 http://onsemi.com 7 v o , output voltage (v ) pp v o , output voltage (v ) pp , open loop voltage gain (db) vol a t a , ambient temperature ( c) 130 v cc , ? v ee ? , supply voltage (v) 35 f, frequency (hz) 30 r l , load resistance to ground ( ) 30 cmr, common mode rejection (db) 100 120 120 110 100 90 80 30 25 20 15 10 5 0 25 20 15 10 5.0 0 , output voltage swing (vpp) o v 25 20 15 10 80 60 40 20 0 f, frequency (hz) psr, power supply rejection (db) 100 80 60 40 20 0 f, frequency (hz) figure 7. open loop voltage gain versus temperature ?55 ?25 0 25 50 85 125 0 3.0 6.0 9.0 12 18 15 100 10 10 ?40 1.0 k 10 k 100 k 500 k 5.0 100 1.0 k 10 k 100 1.0 k 10 k 100 k 1.0 m 10 100 1.0 k 10 k 100 k 1.0 m sleepmode (r l = 1.0 m ) awakemode (r l = 1.0 m ) figure 8. output voltage swing versus supply voltage awakemode (r l = 600 ) sleepmode (r l = 1.0 m ) t a = 25 c figure 9. output voltage versus frequency v cc = +15 v v ee = ?15 v a v = +1.0 t a = 25 c awakemode (r l = 600 ) sleepmode (r l = 1.0 m ) figure 10. maximum peak ? to ? peak output voltage swing versus load resistance awakemode v cc = +15 v v ee = ?15 v f = 1.0 khz t a = 25 c figure 11. common mode rejection versus frequency awakemode sleepmode v cc = +15 v v ee = ?15 v v cm = 0 v v cm = 1.5 v t a = 25 c +psr awakemode ?psr awakemode +psr sleepmode ?psr sleepmode figure 12. power supply rejection versus frequency v cc = +15 v v ee = ?15 v v cc = 1.5 v t a = 25 c
mc33102 http://onsemi.com 8 , output short circuit current (ma) sc i ?? , current threshold ( a) th1 i , output short circuit current (ma) sc i t a , ambient temperature ( c) , supply current per amplifier ( a) d i t a , ambient temperature ( c) , slew rate (v/ s) t a , ambient temperature ( c) v cc , ? v ee ? , supply voltage (v) v cc , ? v ee ? , supply voltage (v) ?? ? v o ? , output voltage (v) , supply current per amplifier (ma) d i sr slew rate (v/ s) sr, figure 13. sleepmode to awakemode current threshold versus supply voltage 200 190 120 150 60 0.20 190 180 170 160 150 140 180 170 160 150 140 130 120 100 80 60 40 20 0 140 130 120 100 90 80 70 110 55 50 45 40 35 30 0.18 0.16 0.14 0.12 0.10 ?55 ?25 0 25 50 85 125 ?55 ?25 0 25 50 85 125 ?55 ?25 0 25 50 85 125 3.0 6.0 9.0 12 18 15 3.0 6.0 9.0 12 18 15 0 3.0 6.0 9.0 12 15 ?40 ?40 ?40 1.2 1.0 0.8 0.6 0.4 2.0 1.8 1.6 1.4 1.2 1.0 0.2 0 , current threshold ( a) th2 i t a = 25 c t a = ? 55 c t a = 125 c t a = 25 c t a = ? 55 c t a = 125 c source sink v cc = +15 v v ee = ?15 v v id = 1.0 v r l < 10 awakemode source sink v cc = +15 v v ee = ?15 v v id = 1.0 v r l < 10 awakemode sleepmode ( a) awakemode (ma) v cc = +15 v v ee = ?15 v no load v cc = +15 v v ee = ?15 v v in = ? 5.0 v to + 5.0 v awakemode (r l = 600 ) sleepmode (r l = 1.0 m ) figure 14. awakemode to sleepmode current threshold versus supply voltage figure 15. output short circuit current versus output voltage figure 16. output short circuit current versus temperature figure 17. power supply current per amplifier versus temperature figure 18. slew rate versus temperature
mc33102 http://onsemi.com 9 v o r1 r2 sleepmode awakemode v cc = +15 v v ee = ?15 v r t = r1 + r2 v o = 0 v t a = 25 c gbw, gain bandwidth product (khz) t a , ambient temperature ( c) 350 , transition time (sec) tr2 t 2.0 0 1.5 1.0 0.5 , gain margin (db) m a 15 , phase margin (deg) m ? 70 300 250 200 5.0 4.5 4.0 3.5 v cc , ? v ee ? , supply voltage (v) 13 11 9.0 7.0 5.0 r t , differential source resistance ( ) 60 50 40 30 20 10 0 r t , differential source resistance ( ) gbw, gain bandwidth product (khz) v o r1 r2 t, time (5.0 s/div) , peak voltage (1.0 v/div) p v r l = 10 k , peak voltage (1.0 v/div) p v t, time (2.0 s/div) r l = 600 figure 19. gain bandwidth product versus temperature ?55 ?25 0 25 50 85 125 ?40 3.0 6.0 9.0 12 18 15 10 100 1.0 k 10 k 10 100 1.0 k 10 k 100 k sleepmode (khz) awakemode (mhz) v cc = +15 v v ee = ?15 v f = 20 khz figure 20. sleepmode to awakemode transition time figure 21. sleepmode to awakemode transition time figure 22. awakemode to sleepmode transition time versus supply voltage t a = 25 c t a = ? 55 c t a = 125 c figure 23. gain margin versus differential source resistance figure 24. phase margin versus differential source resistance sleepmode awakemode v cc = +15 v v ee = ?15 v r t = r1 + r2 v o = 0 v t a = 25 c
mc33102 http://onsemi.com 10 2a 1b 2b 1a 1a) phase, v s = 18 v 2a) phase, v s = 2.5 v 1b) gain, v s = 18 v 2b) gain, v s = 2.5 v t a = 25 c r l = 600 c l < 10 pf awakemode c l , output load capacitance (pf) 14 f, frequency (hz) 70 cs, channel separation (db) 140 thd, total harmonic distortion (%) 100 , open loop gain margin (db) m a , phase margin (degrees) m ? 12 10 8.0 6.0 4.0 2.0 0 c l , output load capacitance (pf) 70 60 50 40 30 20 10 0 , voltage gain (db) v a 50 30 10 ?10 ?30 1a 2a 1b 2b , excess phase (degrees) , voltage gain (db) v a 70 50 30 10 ?10 ?30 f, frequency (hz) , excess phase (degrees) 120 100 80 60 40 20 0 f, frequency (hz) 10 1.0 0.1 0.01 0.001 f, frequency (hz) figure 25. open loop gain margin versus output load capacitance 10 10 k 100 1.0 k 10 100 1.0 k 10 k 100 k 1.0 m 10 m 30 k 100 k 1.0 m 10 m 100 1.0 k 10 k 100 k 100 1.0 k 10 k 100 k sleepmode awakemode v cc = +15 v v ee = ?15 v v o = 0 v sleepmode awakemode v cc = +15 v v ee = ?15 v v o = 0 v figure 26. phase margin versus output load capacitance figure 27. sleepmode voltage gain and phase versus frequency 1a) phase, v s = 18 v 2a) phase, v s = 2.5 v 1b) gain, v s = 18 v 2b) gain, v s = 2.5 v t a = 25 c r l = 1.0 m c l < 10 pf sleepmode 160 200 240 120 160 200 240 80 120 40 40 80 figure 28. awakemode voltage gain and phase versus frequency figure 29. channel separation versus frequency v cc = +15 v v ee = ?15 v r l = 600 awakemode v cc = +15 v v ee = ?15 v r l = 600 v o = 2.0 vpp t a = 25 c awakemode a v = +1000 a v = +100 a v = +10 a v = +1.0 figure 30. total harmonic distortion versus frequency
mc33102 http://onsemi.com 11 , output impedance () o z 250 e , input referred noise voltage (nv/ hz ) 100 1.0 os, percent overshoot (%) c l , load capacitance (pf) 70 200 150 100 50 0 f, frequency (hz) 50 10 5.0 f, frequency (hz) 0.8 0.6 0.4 0.2 0.1 i , input noise current (pa/ hz) f, frequency (hz) 60 50 40 30 20 10 0 n n v o rs v o , peak voltage (5.0 v/div) p v t, time (50 s/div) r l = , peak voltage (5.0 v/div) p v t, time (5.0 s/div) r l = 600 figure 31. awakemode output impedance versus frequency 10 1.0 k 10 k 1.0 m 10 m 100 k 10 100 10 k 100 k 1.0 k 10 100 10 k 100 k 1.0 k 100 1.0 k v cc = +15 v v ee = ?15 v v cm = 0 v v o = 0 v t a = 25 c awakemode a v = 1000 a v = 10 a v = 1.0 a v = 100 figure 32. input referred noise voltage versus frequency sleepmode awakemode v cc = +15 v v ee = ?15 v t a = 25 c figure 33. current noise versus frequency v cc = +15 v v ee = ?15 v t a = 25 c (rs = 10 k) awakemode sleepmode figure 34. percent overshoot versus load capacitance v cc = +15 v v ee = ?15 v t a = 25 c awakemode (r l = 600 ) sleepmode (r l = 1.0 m ) figure 35. sleepmode large signal transient response figure 36. awakemode large signal transient response
mc33102 http://onsemi.com 12 t, time (50 s/div) , peak voltage (50 mv/div) p v t, time (50 s/div) r l = 600 c l = 0 pf , peak voltage (50 mv/div) p v r l = c l = 0 pf figure 37. sleepmode small signal transient response figure 38. awakemode small signal transient response circuit information the mc33102 was designed primarily for applications where high performance (which requires higher current drain) is required only part of the time. the two ? state feature of this op amp enables it to conserve power during idle times, yet be powered up and ready for an input signal. possible applications include laptop computers, automotive, cordless phones, baby monitors, and battery operated test equipment. although most applications will require low power consumption, this device can be used in any application where better efficiency and higher performance is needed. the sleep ? mode ? amplifier has two states; a sleepmode and an awakemode. in the sleepmode state, the amplifier is active and functions as a typical micropower op amp. when a signal is applied to the amplifier causing it to source or sink sufficient current (see figure 13), the amplifier will automatically switch to the awakemode. see figures 20 and 21 for transition times with 600 and 10 k loads. the awakemode uses higher drain current to provide a high slew rate, gain bandwidth, and output current capability. in the awakemode, this amplifier can drive 27 vpp into a 600 load with v s = 15 v. an internal delay circuit is used to prevent the amplifier from returning to the sleepmode at every zero crossing. this delay circuit also eliminates the crossover distortion commonly found in micropower amplifiers. this amplifier can process frequencies as low as 1.0 hz without the amplifier returning to sleepmode, depending on the load. the first stage pnp differential amplifier provides low noise performance in both the sleep and awake modes, and an all npn output stage provides symmetrical source and sink ac frequency response. applications information the mc33102 will begin to function at power supply voltages as low as v s = 1.0 v at room temperature. (at this voltage, the output voltage swing will be limited to a few hundred mil livolts.) the input voltages must range between v cc and v ee supply voltages as shown in the maximum rating table. specifically, allowing the input to go more negative than 0.3 v below v ee may cause product damage. also, exceeding the input common mode voltage range on either input may cause phase reversal, even if the inputs are between v cc and v ee . when power is initially applied, the part may start to operate in the awakemode. this is because of the currents generated due to charging of internal capacitors. when this occurs and the sleepmode state is desired, the user will have to wait approximately 1.5 seconds before the device will switch back to the sleepmode. to prevent this from occurring, ramp the power supplies from 1.0 v to full supply. notice that the device is more prone to switch into the awakemode when v ee is adjusted than with a similar change in v cc . the amplifier is designed to switch from sleepmode to awakemode whenever the out put current exceeds a preset current threshold (i th ) of approximately 160 a. as a result, the output switching threshold voltage (v st ) is controlled by the output loading resistance (r l ). this loading can be a load resistor, feedback resistors, or both. then: v st = (160 a) r l large valued load resistors require a large output voltage to switch, but reduce unwanted transitions to the awakemode. for instance, in cases where the amplifier is connected with a large closed loop gain (a cl ), the input offset voltage (v io ) is multiplied by the gain at the output and could produce an output voltage exceeding v st with no input signal applied. small values of r l allow rapid transition to the awakemode because most of the transition time is consumed slewing in the sleepmode until v st is reached (see figures 20, 21). the output switching threshold voltage v st is higher for larger
mc33102 http://onsemi.com 13 values of r l , requiring the amplifier to slew longer in the slower sleepmode state before switching to the awakemode. the transition time (t tr1 ) required to switch from sleep to awake mode is: t tr1 t d i th (r l sr sleepmode ) where: t d = amplifier delay ( 1.0 s) i th = output threshold current for more transition (160 a) r l = load resistance sr sleepmode = sleepmode slew rate (0.16 v/ s) although typically 160 a, i th varies with supply voltage and temperature. in general, any current loading on the output which causes a current greater than i th to flow will switch the amplifier into the awakemode. this includes transition currents such as those generated by charging load capacitances. in fact, the maximum capacitance that can be driven while attempting to remain in the sleepmode is approximately 1000 pf. c l(max) = i th /sr sleepmode = 160 a/(0.16 v/ s) = 1000 pf any electrical noise seen at the output of the mc33102 may also cause the device to transition to the awakemode. to minimize this problem, a resistor may be added in series with the output of the device (inserted as close to the device as possible) to isolate the op amp from both parasitic and load capacitance. the awakemode to sleepmode transition time is controlled by an internal delay circuit, which is necessary to prevent the amplifier from going to sleep during every zero crossing. this time is a function of supply voltage and temperature as shown in figure 22. gain bandwidth product (gbw) in both modes is an important system design consideration when using a sleepmode amplifier. the amplifier has been designed to obtain the maximum gbw in both modes. ?smooth? ac transitions between modes with no noticeable change in the amplitude of the output voltage waveform will occur as long as the closed loop gains (a cl ) in both modes are substantially equal at the frequency of operation. for smooth ac transitions: (a clsleepmode ) (bw) < gbw sleepmode where: a clsleepmode = closed loop gain in the sleepmode bw = the required system bandwidth or operating frequency testing information to determine if the mc33102 is in the awakemode or the sleepmode, the power supply currents (i d + and i d ? ) must be measured. when the magnitude of either power supply current exceeds 400 a, the device is in the awakemode. when the magnitudes of both supply currents are less than 400 a, the device is in the sleepmode. since the total supply current is typically ten times higher in the awakemode than the sleepmode, the two states are easily distinguishable. the measured value of i d + equals the i d of both devices (for a dual op amp) plus the output source current of device a and the output source current of device b. similarly, the measured value of i d ? is equal to the i d ? of both devices plus the output sink current of each device. i out is the sum of the currents caused by both the feedback loop and load resistance. the total i out needs to be subtracted from the measured i d to obtain the correct i d of the dual op amp. an accurate way to measure the awakemode i out current on automatic test equipment is to remove the i out current on both channel a and b. then measure the i d values before the device goes back to the sleepmode state. the transition will take typically 1.5 seconds with 15 v power supplies. the large signal sleepmode testing in the characterization was accomplished with a 1.0 m load resistor which ensured the device would remain in sleepmode despite large voltage swings.
mc33102 http://onsemi.com 14 package dimensions pdip ? 8 p suffix case 626 ? 05 issue k notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 ? a ? ? b ? ? t ? seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m ??? 10 ??? 10 n 0.76 1.01 0.030 0.040 so ? 8 d suffix case 751 ? 06 issue t seating plane 1 4 5 8 a 0.25 m cb ss 0.25 m b m h c x 45 l dim min max millimeters a 1.35 1.75 a1 0.10 0.25 b 0.35 0.49 c 0.19 0.25 d 4.80 5.00 e 1.27 bsc e 3.80 4.00 h 5.80 6.20 h 0 7 l 0.40 1.25 0.25 0.50 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. dimensions are in millimeter. 3. dimension d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.127 total in excess of the b dimension at maximum material condition. d e h a b e b a1 c a 0.10
mc33102 http://onsemi.com 15 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc33102/d sleepmode is a trademark of semiconductor components industries, llc. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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